Synopsys Announces Industry's First HDMI 1.4 PHY IP in 28-nanometer Processes for Multiple Foundries

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February 13, 2012
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Synopsys Announces Industry's First HDMI 1.4 PHY IP in 28-nanometer Processes for Multiple Foundries

Silicon-proven DesignWare HDMI IP Enables Designers to Achieve Power and Performance Goals for Advanced Mobile Multimedia and Digital Home Designs

MOUNTAIN VIEW, Calif., Feb. 13, 2012 /PRNewswire/ -- Synopsys, Inc. (Nasdaq: SNPS), a world leader in software and IP used in the design, verification and manufacture of electronic components and systems, today announced the immediate availability of DesignWare® HDMI (High-Definition Multimedia Interface) 1.4 PHY IP in advanced 28-nanometer (nm) processes for multiple leading foundries.  System-on-chip (SoC) designs for high-end mobile multimedia and digital home applications are migrating to 28-nm processes to minimize power consumption and maximize performance. The DesignWare HDMI 1.4 PHY IP has been optimized for low power, small area and high performance at 28-nm, enabling design teams to quickly integrate the HDMI interface into their chips with less risk and effort.

"As a pioneer of wireless high-definition video chips for consumer electronic devices and as the founder of the WHDI Consortium (http://www.whdi.org), it was essential for us to partner with a trusted IP supplier like Synopsys to mitigate the development risks of our next-generation SoC," said Dr. Zvi Reznic, CTO and co-founder of AMIMON. "Synopsys' proven DesignWare HDMI solutions offer a compelling combination of small area, low power and support for the latest features, including HDMI Ethernet Audio Return Channel and 3D formats. Using Synopsys' high-quality DesignWare HDMI IP enables us to lower integration risk and achieve a predictable path to silicon success."

The DesignWare HDMI 1.4 IP solution is a comprehensive and fully tested suite of HDMI TX (transmitter) and RX (receiver) digital controllers and high-speed PHY IP. The configurable TX and RX controllers enable designers to optimize the IP for their specific area, power and frequency requirements, and the mixed-signal PHY hard macro offers a superior analog front-end supporting category 2-certified HDMI cables up to 20 foot in length. To keep pace with rapidly evolving 3D technology and achieve audio and video quality on par with digital cinema systems, Synopsys' HDMI IP supports all major 3D and 4K resolution modes with a bandwidth of up to 3.4 Gbps. Additionally, baseline software drivers are included to ease integration into the full SoC. The DesignWare HDMI 1.4 IP solution is fully compliant with both the HDMI and High-bandwidth Digital Content Protection (HDCP) specifications and has received certification from HDMI authorized testing centers.

"The rapid adoption of advanced technologies like 3D in high-end multimedia applications is driving an increased need for chips that deliver high performance with lowpower consumption," said John Koeter, vice president of marketing for IP and systems at Synopsys. "Synopsys has worked closely with leading foundries to help our mutual customers meet their evolving multimedia requirements. Availability of our DesignWare HDMI 1.4 IP on multiple 28-nanometer processes ensures designers have access to the high-quality, silicon-proven IP they need to quickly incorporate the latest audio and video functionality into their next-generation mobile and digital home devices."

Availability

DesignWare HDMI 1.4 PHY IP is available now in 90-nm to 28-nm process nodes for multiple foundries. The DesignWare HDMI 1.4 TX and RX digital controllers are also available now. For more information please visit: http://www.synopsys.com/hdmi.

About DesignWare® IP

Synopsys is a leading provider of high-quality, silicon-proven IP solutions for SoC designs. The broad DesignWare IP portfolio includes complete interface IP solutions consisting of controllers, PHY and verification IP for widely used protocols, analog IP, embedded memories, logic libraries and configurable processor cores. To support software development and hardware/software integration of the IP, Synopsys offers drivers, transaction-level models, and prototypes for many of its IP products. Synopsys' HAPS® FPGA-Based Prototyping Solution enables validation of the IP and the SoC in the system context. Synopsys' Virtualizer(TM) virtual prototyping tool set allows developers to start the development of software for the IP or the entire SoC significantly earlier compared to following traditional methods. With a robust IP development methodology, extensive investment in quality, IP prototyping, software development and comprehensive technical support, Synopsys enables designers to accelerate time-to-market and reduce integration risk. For more information on DesignWare IP, visit: http://www.synopsys.com/designware. Follow us on Twitter at http://twitter.com/designware_ip.

About Synopsys®

Synopsys, Inc. (Nasdaq:SNPS) is a world leader in electronic design automation (EDA), supplying the global electronics market with the software, intellectual property (IP) and services used in semiconductor design, verification and manufacturing. Synopsys' comprehensive, integrated portfolio of implementation, verification, IP, manufacturing and field-programmable gate array (FPGA) solutions helps address the key challenges designers and manufacturers face today, such as power and yield management, system-to-silicon verification and time-to-results. These technology-leading solutions help give Synopsys customers a competitive edge in bringing the best products to market quickly while reducing costs and schedule risk. Synopsys is headquartered in Mountain View, California, and has approximately 70 offices located throughout North America, Europe, Japan, Asia and India. Visit Synopsys online at http://www.synopsys.com/.

Editorial Contacts:

Sheryl Gulizia
Synopsys, Inc.
650-584-8635
sgulizia@synopsys.com

Stephen Brennan
MCA, Inc.
650-968-8900 x114
sbrennan@mcapr.com

SOURCE  Synopsys, Inc.

Synopsys, Inc.

Web Site: http://www.synopsys.com

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