Synopsys Unveils Industry's First Complete Audio IP Subsystem

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March 26, 2012
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Synopsys Unveils Industry's First Complete Audio IP Subsystem

Integrated, Configurable Hardware and Software Solution Enables "Drop-in" Audio Functionality Supporting Latest Audio Standards

Highlights:

-  Pre-verified hardware and software subsystem significantly reduces design and integration effort, lowers design risk and accelerates time-to-market

-  Support for 2.0 to 7.1 audio streams with 24-bit precision meets latest audio standards

-  Complete, integrated software environment enables seamless plug-in to the host application

-  Comprehensive library of software audio codecs includes support for latest audio standards from Dolby, DTS and SRS Labs

-  Analog audio codecs provide high-quality connections for line inputs and outputs, microphones, loud speakers and headphones with dynamic range of 96 dB

-  Configuration of complete audio IP subsystem can be done in hours instead of weeks

MOUNTAIN VIEW, Calif., March 26, 2012 /PRNewswire/ -- Synopsys, Inc. (Nasdaq: SNPS), a world leader in software and IP used in the design, verification and manufacture of electronic components and systems, today announced the availability of the DesignWare® SoundWave Audio Subsystem, a complete, integrated hardware and software audio IP subsystem for system-on-chip (SoC) designs. Synopsys' SoundWave Audio Subsystem is fully configurable and supports 2.0 to 7.1 audio streams with 24-bit precision to meet the requirements of a broad range of audio applications such as digital TVs, set-top boxes, Blu-ray Discs, portable audio devices and tablets.

To view the multimedia news release, please go to: http://www.synopsys.com/Company/PressRoom/Pages/audio-ip-subsytem-news-release.aspx

The SoundWave Audio Subsystem consists of the following components: DesignWare ARC® 32-bit audio processors; standard digital interfaces; analog codecs; a comprehensive library of software audio codecs supporting the latest formats from Dolby, DTS and SRS; and a complete software environment including an integrated media streaming framework. The SoundWave Audio Subsystem also includes both virtual and FPGA-based prototypes to help engineering teams accelerate software development and validation of the full system. By integrating multiple IP blocks together with software as a pre-verified audio subsystem, Synopsys gives designers an SoC-ready audio solution that can significantly reduce their SoC design and integration effort, lower design risk and accelerate time-to-market.

The increasing use of multi-channel audio content and higher sampling rates in audio applications is adding to the complexity of many of today's consumer-targeted SoCs.  In addition, new audio specifications require more signal processing and bandwidth to deliver high quality sound reproduction across a wider range of audio formats. The use of dedicated audio subsystems enables audio processing to be off-loaded from the host processor, thus reducing design complexity and improving the performance and efficiency of the SoC.

"With the average number of IP blocks in an SoC expected to reach close to 120 by 2014, designers need solutions that help them reduce the effort needed to integrate the IP and manage the complexity of those blocks," said Rich Wawrzyniak, senior market analyst at Semico Research Corporation. "With complete, pre-verified IP subsystems, which include the hardware as well as the software that goes around the IP, designers can solve their design issues at the chip-level rather than the individual block level. With the DesignWare SoundWave Audio Subsystem, Synopsys is pioneering new ground in the IP industry that will enable electronics developers to innovate at a much faster rate."

Integrated Hardware
The SoundWave Audio Subsystem features the choice of an ARC single or dual-core power-efficient 32-bit audio processor optimized for processing multiple high-definition, multi-channel audio streams in parallel. The subsystem includes digital I2S and S/PDIF interfaces for off-chip audio connections as well as high-bandwidth on-chip connections to interfaces like HDMI. ARM® AMBA® 3 AXI(TM)/AHB protocol system interfaces ease integration into the SoC infrastructure. Analog audio codecs provide high-quality audio connections for line inputs and outputs, microphones, loud speakers and headphones. An easy-to-use configuration tool allows designers to quickly select options such as number of channels and number of audio interfaces, enabling a complete audio subsystem to be configured in hours instead of weeks if done manually. Synopsys also offers SoC integration services to help customers integrate the subsystem into their chip or customize it to meet their unique application requirements.

Dedicated Software
The SoundWave Audio Subsystem offers a complete, ready-to-use software environment including audio codecs that support the latest multi-channel audio formats from Dolby Laboratories (e.g., Dolby Digital Plus and TrueHD), DTS (e.g., DTS HD Master Audio), SRS Labs (e.g., TruSurround HD4 and TruVolume) and Microsoft (e.g., WMA 10 Pro), as well as popular open source formats like Ogg Vorbis and FLAC. The SoundWave Audio Subsystem's integrated media streaming framework embeds decoders, encoders and audio post-processing functions such as volume control, equalization and surround balance. The framework allows software codecs and post-processing software to be easily instantiated into the subsystem. Audio plug-ins based on the industry-standard GStreamer multimedia software enable developers to quickly integrate audio subsystem software into their host application software.

Virtual and Hardware Prototypes
Developers of software-rich electronic devices, particularly those targeted at the mobile and consumer markets, must address not only the escalating amount of software content in their designs, but also the challenge of developing the software and integrating it with the hardware. To ease the software development effort, a Synopsys Virtualizer(TM)-based virtual prototype of the SoundWave Audio Subsystem enables early integration of the audio software stack with the application software, months before silicon becomes available. The audio subsystem's HAPS® FPGA-based prototyping solution enables immediate software development and provides a scalable platform for rapid full system integration and validation.

"As designers evolve their methodologies to cope with the growing complexity of SoC designs, IP deliverables must also evolve," said John Koeter, vice president of marketing for IP and systems at Synopsys. "The best mix of hardware and software is needed to help designers meet the performance, cost, power and schedule requirements of their designs. The DesignWare SoundWave Audio Subsystem enables designers to significantly shorten their time from concept to implementation by providing a complete end-to-end audio subsystem that has been pre-validated and is system-ready."

Availability
The DesignWare Audio Subsystem is available now for early adopters with general availability planned for April 2012. For more information, please visit http://www.synopsys.com/audiosubsystem

About DesignWare IP
Synopsys is a leading provider of high-quality, silicon-proven IP solutions for SoC designs. The broad DesignWare IP portfolio includes complete interface IP solutions consisting of controllers, PHY and verification IP for widely used protocols, analog IP, embedded memories, logic libraries, processor cores and subsystems. To support software development and hardware/software integration of the IP, Synopsys offers drivers, transaction-level models, and prototypes for many of its IP products. Synopsys' HAPS® FPGA-Based Prototyping Solution enables validation of the IP and the SoC in the system context. Synopsys' Virtualizer virtual prototyping tool set allows developers to start the development of software for the IP or the entire SoC significantly earlier compared to traditional methods. With a robust IP development methodology, extensive investment in quality, IP prototyping, software development and comprehensive technical support, Synopsys enables designers to accelerate time-to-market and reduce integration risk. For more information on DesignWare IP, visit: http://www.synopsys.com/designware.

About Synopsys®
Synopsys, Inc. (Nasdaq:SNPS) is a world leader in electronic design automation (EDA), supplying the global electronics market with the software, intellectual property (IP) and services used in semiconductor design, verification and manufacturing. Synopsys' comprehensive, integrated portfolio of implementation, verification, IP, manufacturing and field-programmable gate array (FPGA) solutions helps address the key challenges designers and manufacturers face today, such as power and yield management, system-to-silicon verification and time-to-results. These technology-leading solutions help give Synopsys customers a competitive edge in bringing the best products to market quickly while reducing costs and schedule risk. Synopsys is headquartered in Mountain View, California, and has approximately 70 offices located throughout North America, Europe, Japan, Asia and India. Visit Synopsys online at http://www.synopsys.com.

Forward Looking Statements
This press release contains forward-looking statements within the meaning of Section 27A of the Securities Act of 1933 and Section 21E of the Securities Exchange Act of 1934, including statements regarding the availability of the DesignWare SoundWave Audio Subsystem. These statements are based on current expectations and beliefs. Actual results could differ materially from those described by these statements due to risks and uncertainties including, but not limited to, unforeseen production or delivery delays, failure to perform as expected, product errors or defects and other risks detailed in Synopsys' filings with the U.S. Securities and Exchange Commission, including those described in the "Risk Factors" section of Synopsys' Annual Report on Form 10-K for the fiscal year ended October 31, 2011.

ARM and AMBA are registered trademarks of ARM Limited. AXI is a trademark of ARM Limited.

Editorial Contacts:

Sheryl Gulizia
Synopsys, Inc.
650-584-8635
sgulizia@synopsys.com

Stephen Brennan
MCA
650-968-8900 x114
sbrennan@mcapr.com

SOURCE  Synopsys, Inc.

Synopsys, Inc.

Web Site: http://www.synopsys.com

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