NovaSparks Launches a pure FPGA-based Order Book Capability for Cash Equities in the US and Europe
The first company to put all market data processes into an FPGA platform to achieve deterministic nanosecond speeds for processing the feed, building and managing the Order Book
BOSTON and PARIS, June 11, 2012 /PRNewswire/ -- NovaSparks, an FPGA market data solution company, launches a pure FPGA Order Book Builder capability. The Order Book building function uses the NovaSparks FPGA Market Data Matrix(TM) architecture and provides deterministic nanosecond speeds. NovaSparks is the first company to commercialize a pure FPGA appliance architecture for market data processing.
The entire data processing of the feed, including the Order Book, achieves deterministic processing latency of 880 nanoseconds (ns) on average. Unlike CPU architectures or hybrid approaches that use a CPU with an FPGA card, the pure FPGA architecture achieves constant, deterministic latency regardless of data rates, the number of venues and symbols, or the number of downstream users.
The FPGA Book Builder outputs a single format, called a normalized stream, regardless of the data format and protocol used by the venue. This normalized output enables trading teams to develop algos for one venue then scale the algo across multiple venues without changing the core algo logic. The depth of book is configurable by the user.
"We believe there is no faster view of the market because no one else has put all market data processing functions together into an FPGA architecture," explains Yves Charles, CEO of NovaSparks. "This announcement proves the FPGA Market Data Matrix architecture can tackle complex tasks and meet the functionality and performance needs of the market," suggests Charles.
"We are excited to see deterministic trading solutions come to market," states Kevin Beadles, Managing Director, Lime Brokerage. "Traders want consistently high-speed reaction times to market signals. A deterministic order book will give them the reliable speeds they need, especially in 'bursty' markets," concludes Beadles.
Senior Director of Research for Aite Group, Adam Honore comments, "The performance gap between pure FPGA architectures and hybrid approaches is widening. As more features become available through hardware acceleration, Trading Firms will have to routinely evaluate whether or not their solution remains competitive in the market."
Live Demos of the pure FPGA Order Book with packet-by-packet latency tracking will be held at the SIFMA expo June 19(th), New York.