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Altera Demonstrates Industry's First 32-Gbps Transceiver with Leading-Edge 20 nm Device
Demonstration Highlights Latest Success in Altera's 20 nm FPGA Early Access Program
SAN JOSE, Calif., April 8, 2013 /PRNewswire/ --Altera Corporation (NASDAQ: ALTR) today announced the company achieved another significant milestone in transceiver technology by demonstrating the industry's first programmable device with 32-Gbps transceiver capabilities. The demonstration uses a 20 nm device based on TSMC's 20SoC process technology. This achievement validates the performance capabilities of 20 nm silicon and is a positive indicator to the more than 500 customers in Altera's early access program who are looking to use next-generation Altera devices in the development of performance demanding, bandwidth-centric applications. A demonstration video showing the industry's first operational 20 nm transceiver technology operating at 32 Gbps is available for viewing on Altera's website at http://www.altera.com/32gbps-20nm.
(Logo: http://photos.prnewswire.com/prnh/20101012/SF78952LOGO)
Demonstrating 32-Gbps transceiver data rates provides Altera insight into how high-performance transceiver designs behave on TSMC's 20SoC process. The transceiver technology Altera is demonstrating today will be integrated into its 20 nm FPGA products, fabricated on TSMC's 20SoC process. These devices enable customers to design next-generation serial links with the lowest power consumption, fastest timing closure and the highest quality signal integrity. Altera has a proven track record in integrating leading-edge transceiver technology into its devices. Altera is the only company today shipping production 28 nm FPGAs with monolithically integrated low-power transceivers operating at 28 Gbps. Being the first FPGA vendor to reach the 32-Gbps milestone in 20 nm silicon further extends Altera's leadership in transceiver technology.
The demonstration video on Altera's web site shows 20 nm transceivers operating at 32 Gbps with just over nine picoseconds of total jitter and extremely low random jitter of 240 femtoseconds. The results show good margin to key industry specifications requited for next-generation 100G systems.
"Today's news represents a significant milestone for the industry and for the transceiver development team at Altera," said Vince Hu, vice president of product and corporate marketing at Altera. "These 20 nm devices contain the key IP components that will be included in our next-generation FPGAs and validating them now provides us confidence we will deliver to the market 20 nm FPGAs on schedule."
Altera's next-generation transceiver innovations enable system developers to support the rapidly increasing amount of data that is being transmitted through the world's networks. The transceivers in Altera's next-generation devices will drive more bandwidth with lower power per channel versus the previous nodes and will support increasing port density by interfacing directly to 100G CPF2 optical modules.
About Altera
Altera® programmable solutions enable system and semiconductor companies to rapidly and cost effectively innovate, differentiate and win in their markets. Find out more about Altera's FPGAs, SoCs, CPLDs and ASICs at http://www.altera.com. Follow Altera via Facebook, RSS and Twitter, and by subscribing to product update emails and newsletters.
ALTERA, ARRIA, CYCLONE, HARDCOPY, MAX, MEGACORE, NIOS, QUARTUS and STRATIX words and logos are trademarks of Altera Corporation and registered in the U.S. Patent and Trademark Office and in other countries. All other words and logos identified as trademarks or service marks are the property of their respective holders as described at http://www.altera.com/legal.
Editor Contact:
Steve Gabriel
Altera Corporation
(408) 544-6846
newsroom@altera.com
SOURCE Altera Corporation
Photo:http://photos.prnewswire.com/prnh/20101012/SF78952LOGO
http://photoarchive.ap.org/
Altera Corporation
Web Site: http://www.altera.com
Altera Demonstrates Industry's First 32-Gbps Transceiver with Leading-Edge 20 nm Device
Demonstration Highlights Latest Success in Altera's 20 nm FPGA Early Access Program
SAN JOSE, Calif., April 8, 2013 /PRNewswire/ --Altera Corporation (NASDAQ: ALTR) today announced the company achieved another significant milestone in transceiver technology by demonstrating the industry's first programmable device with 32-Gbps transceiver capabilities. The demonstration uses a 20 nm device based on TSMC's 20SoC process technology. This achievement validates the performance capabilities of 20 nm silicon and is a positive indicator to the more than 500 customers in Altera's early access program who are looking to use next-generation Altera devices in the development of performance demanding, bandwidth-centric applications. A demonstration video showing the industry's first operational 20 nm transceiver technology operating at 32 Gbps is available for viewing on Altera's website at http://www.altera.com/32gbps-20nm.
(Logo: http://photos.prnewswire.com/prnh/20101012/SF78952LOGO)
Demonstrating 32-Gbps transceiver data rates provides Altera insight into how high-performance transceiver designs behave on TSMC's 20SoC process. The transceiver technology Altera is demonstrating today will be integrated into its 20 nm FPGA products, fabricated on TSMC's 20SoC process. These devices enable customers to design next-generation serial links with the lowest power consumption, fastest timing closure and the highest quality signal integrity. Altera has a proven track record in integrating leading-edge transceiver technology into its devices. Altera is the only company today shipping production 28 nm FPGAs with monolithically integrated low-power transceivers operating at 28 Gbps. Being the first FPGA vendor to reach the 32-Gbps milestone in 20 nm silicon further extends Altera's leadership in transceiver technology.
The demonstration video on Altera's web site shows 20 nm transceivers operating at 32 Gbps with just over nine picoseconds of total jitter and extremely low random jitter of 240 femtoseconds. The results show good margin to key industry specifications requited for next-generation 100G systems.
"Today's news represents a significant milestone for the industry and for the transceiver development team at Altera," said Vince Hu, vice president of product and corporate marketing at Altera. "These 20 nm devices contain the key IP components that will be included in our next-generation FPGAs and validating them now provides us confidence we will deliver to the market 20 nm FPGAs on schedule."
Altera's next-generation transceiver innovations enable system developers to support the rapidly increasing amount of data that is being transmitted through the world's networks. The transceivers in Altera's next-generation devices will drive more bandwidth with lower power per channel versus the previous nodes and will support increasing port density by interfacing directly to 100G CPF2 optical modules.
About Altera
Altera® programmable solutions enable system and semiconductor companies to rapidly and cost effectively innovate, differentiate and win in their markets. Find out more about Altera's FPGAs, SoCs, CPLDs and ASICs at http://www.altera.com. Follow Altera via Facebook, RSS and Twitter, and by subscribing to product update emails and newsletters.
ALTERA, ARRIA, CYCLONE, HARDCOPY, MAX, MEGACORE, NIOS, QUARTUS and STRATIX words and logos are trademarks of Altera Corporation and registered in the U.S. Patent and Trademark Office and in other countries. All other words and logos identified as trademarks or service marks are the property of their respective holders as described at http://www.altera.com/legal.
Editor Contact:
Steve Gabriel
Altera Corporation
(408) 544-6846
newsroom@altera.com
SOURCE Altera Corporation
Photo:http://photos.prnewswire.com/prnh/20101012/SF78952LOGO
http://photoarchive.ap.org/
Altera Corporation
Web Site: http://www.altera.com