Cadence Introduces First Interface and Verification IP Solution for CCIX to Advance New Class of Datacenter Servers
Poster: SySAdmin
Posted on May 2, 2017 at 8:21:01 AM
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* @tip Set the styling for all second-level headings in your emails.
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* @tip Set the styling for all third-level headings in your emails.
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/**
* @tip Set the styling for all fourth-level headings in your emails. These should be the smallest of your headings.
* @style heading 4
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line-height: 125%;
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* @tip Set the styling for your email's preheader links. Choose a color that helps them stand out from your text.
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* @tip Set the styling for your email's header links. Choose a color that helps them stand out from your text.
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* @tip Set the styling for your email's main content links. Choose a color that helps them stand out from your text.
*/
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* @tip Set the styling for your email's data table text. Choose a size and color that is easy to read.
*/
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/**
* @tip Set the styling for your email's data table links. Choose a color that helps them stand out from your text.
*/
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* @tip Set the styling for your email's data table text. Choose a size and color that is easy to read.
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font-family: Helvetica;
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* @tip Set the styling for your email's data table links. Choose a color that helps them stand out from your text.
*/
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* @tip Set the styling for your email's left column content links. Choose a color that helps them stand out from your text.
*/
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* @tip Set the styling for your email's center column content text. Choose a size and color that is easy to read.
*/
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line-height: 150%;
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* @tip Set the styling for your email's center column content links. Choose a color that helps them stand out from your text.
*/
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* @tip Set the styling for your email's right column content text. Choose a size and color that is easy to read.
*/
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line-height: 150%;
padding-top: 0;
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* @tip Set the styling for your email's right column content links. Choose a color that helps them stand out from your text.
*/
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line-height: 150%;
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* @tip Set the styling for your email's footer links. Choose a color that helps them stand out from your text.
*/
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* @tip Make the body content text larger in size for better readability on small screens. We recommend a font size of at least 16px.
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*/
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/**
* @tip Set the styling for your email's data table text. Choose a size and color that is easy to read.
*/
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font-size: 14px;
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/**
* @tip Set the styling for your email's data table links. Choose a color that helps them stand out from your text.
*/
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color: #3d98c6;
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* @tip Set the styling for your email's data table text. Choose a size and color that is easy to read.
*/
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color: #202020;
font-family: Helvetica;
font-size: 12px;
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line-height: 150%;
text-align: left;
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/**
* @tip Set the styling for your email's data table links. Choose a color that helps them stand out from your text.
*/
.dataTableContent a:link, .dataTableContent a:visited, /* Yahoo! Mail Override */ .dataTableContent a .yshortcuts /* Yahoo! Mail Override */{
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* @tip Make the column image fluid for portrait or landscape view adaptability, and set the image's original width as the max-width. If a fluid setting doesn't work, set the image width to half its original size instead.
*/
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max-width: 480px !important;
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* @tip Make the left column content text larger in size for better readability on small screens. We recommend a font size of at least 16px.
*/
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line-height: 125% !important;
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/**
* @tip Make the center column content text larger in size for better readability on small screens. We recommend a font size of at least 16px.
*/
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font-size: 16px !important;
line-height: 125% !important;
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/**
* @tip Make the right column content text larger in size for better readability on small screens. We recommend a font size of at least 16px.
*/
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font-size: 16px !important;
line-height: 125% !important;
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/* ======== Footer Styles ======== */
/**
* @tip Make the body content text larger in size for better readability on small screens.
*/
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line-height: 115% !important;
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<div xmlns="http://www.w3.org/1999/xhtml" xmlns:xn="http://www.xmlnews.org/ns/" class="xn-newslines">
<h1 class="xn-hedline">Cadence Introduces First Interface and Verification IP Solution for CCIX to Advance New Class of Datacenter Servers</h1>
<p class="xn-distributor">PR Newswire</p>
<p class="xn-dateline">SAN JOSE, Calif., May 2, 2017</p>
</div>
<div class="xn-content" xmlns="http://www.w3.org/1999/xhtml" xmlns:xn="http://www.xmlnews.org/ns/">
<p>
<b><i>Design and verification IP address server cache-coherency requirements</i></b>
</p>
<p>
<span class="xn-location">SAN JOSE, Calif.</span>, <span class="xn-chron">May 2, 2017</span> /PRNewswire/ -- Cadence Design Systems, Inc. (NASDAQ: CDNS) today announced the industry's first interface and verification IP solution for Cache Coherent Interconnect for Accelerators (CCIX), an open chip-to-chip interconnect standard that advances the development of a new class of server solutions to address the challenging performance and latency requirements in the growing datacenter market. The Cadence<sup>®</sup> IP for CCIX, which consists of controller, PHY and verification IP, allows semiconductor manufacturers to develop new products for the enterprise server market more quickly and with greater confidence. The new IP for CCIX further extends the Cadence IP portfolio and Cadence Verification Suite technology, key components of the company's System Design Enablement strategy. </p>
<p>The proliferation of data-intensive applications along with the constraints of power and cooling are driving datacenters to deploy servers incorporating special-purpose accelerators. These accelerators share memory with processors in a cache-coherent manner and enable a heterogeneous server architecture to seamlessly share data with current speeds up to 25Gbps, reducing latency and increasing performance. </p>
<p>Supported by industry leaders, CCIX is a comprehensive hardware and software solution that builds on the pervasive PCI Express<sup>®</sup> (PCIe<sup>®</sup>) technology. The CCIX standard allows processors based on different instruction set architectures to extend the benefits of cache-coherent peer processing to various acceleration devices.</p>
<p>"ARM recognizes that the new CCIX specification supporting cache coherency is extremely important to the enterprise ecosystem," said <span class="xn-person">Monika Biddulph</span>, general manager, Systems and Software Group, ARM. "Together, the Cadence IP for CCIX and the ARM<sup>®</sup> CoreLink™ CMN-600 Coherent Mesh Network provide a scalable, heterogeneous compute platform with high performance multichip connectivity that will enable innovative solutions for applications such as machine learning, network processing, storage off-load and analytics."</p>
<p>The Cadence Interface IP for CCIX is an integrated solution for CCIX based on the PCIe 4.0 specification. The integrated solution for CCIX includes controller, PHY, software drivers, scripts for design and verification, simulation models and user guides. The entire package is pre-verified using Cadence verification IP for CCIX. For more information on the interface IP solution, visit: <a href="https://ip.cadence.com/ipportfolio/ip-portfolio-overview/interface-ip/ccix-ip&CMP=DIP_PrRel_CDN_CCIX_0501_PP" rel="nofollow" target="_blank">http://www.cadence.com/go/ccixdip</a>.</p>
<p>"CCIX enables a new class of interconnect for emerging acceleration applications in the datacenter," said <span class="xn-person">Gaurav Singh</span>, chairman of the CCIX Consortium. "We are pleased to see Cadence taking a leading role in providing early access to IP products to accelerate CCIX adoption among our member companies."</p>
<p>The Cadence Verification IP for CCIX supports the Cadence Xcelium<sup>™</sup> Parallel Logic Simulator and third-party simulators. It also supports all major languages and methodologies and is used to verify all CCIX specification levels including PHY, transaction and cache coherency. The Cadence Interconnect Validator works with the verification IP for CCIX to ensure correctness and completeness of data as it passes through the fabric. For more information on the verification IP solution, visit: <a href="https://ip.cadence.com/ipportfolio/verification-ip/simulation-vip/other/ccix-simulation-vip&CMP=VIP_PrRel_CDN_CCIX_0501_PP" rel="nofollow" target="_blank">http://www.cadence.com/go/ccixvip</a>. </p>
<p>"Cadence is a pioneer and industry leader in PCIe, and we're leveraging our deep expertise in PCIe and cache coherency to develop an innovative solution for CCIX," said Babu Mandava, senior vice president and general manager of the IP Group at Cadence. "Because our CCIX enterprise development solution is integrated and based on silicon-proven design IP for the PCIe specification, along with mature and comprehensive verification IP, our customers can develop new products for the server market more quickly, with high confidence and shorter time to market. We are encouraged by our early customer engagements."</p>
<p>
<b>About Cadence </b>
</p>
<p>Cadence enables electronic systems and semiconductor companies to create the innovative end products that are transforming the way people live, work and play. Cadence software, hardware and semiconductor IP are used by customers to deliver products to market faster. The company's System Design Enablement strategy helps customers develop differentiated products—from chips to boards to systems—in mobile, consumer, cloud datacenter, automotive, aerospace, IoT, industrial and other market segments. Cadence is listed as one of Fortune Magazine's 100 Best Companies to Work For. Learn more at <a href="http://www.cadence.com/" rel="nofollow" target="_blank">cadence.com</a><u>.</u>
</p>
<p>
<i>© 2017 Cadence Design Systems, Inc. All rights reserved worldwide. Cadence, the Cadence logo and the other Cadence marks found at </i><i><a href="http://www.cadence.com/go/trademarks" rel="nofollow">http://www.cadence.com/go/trademarks</a></i> <i>are trademarks or registered trademarks of Cadence Design Systems, Inc. </i><i>PCI Express and PCIe are registered trademarks of PCI-SIG.</i><i> All other trademarks are the property of their respective holders.</i>
</p>
<p>Cadence Newsroom<br>408-944-7039<br>
<a href="mailto:newsroom@cadence.com" rel="nofollow" target="_blank">newsroom@cadence.com</a>
</p>
<p> </p>
<p>SOURCE Cadence Design Systems, Inc.</p>
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* @tip Set the background color and top border for your email. You may want to choose colors that match your company's branding.
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* @tip Set the background color and top border for your email. You may want to choose colors that match your company's branding.
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* @tip Set the border for your email.
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* @tip Set the styling for your email's preheader text. Choose a size and color that is easy to read.
*/
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line-height: 125%;
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* @tip Set the styling for your email's preheader links. Choose a color that helps them stand out from your text.
*/
.preheaderContent a:link, .preheaderContent a:visited, /* Yahoo! Mail Override */ .preheaderContent a .yshortcuts /* Yahoo! Mail Override */{
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/**
* @tip Set the styling for your email's main content links. Choose a color that helps them stand out from your text.
*/
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font-weight: normal;
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max-width: 560px;
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*/
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color: #404040;
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*/
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*/
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*/
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line-height: 150%;
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* @tip Set the styling for your email's left column content links. Choose a color that helps them stand out from your text.
*/
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/**
* @tip Set the styling for your email's center column content text. Choose a size and color that is easy to read.
*/
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line-height: 150%;
padding-top: 0;
padding-right: 20px;
padding-bottom: 20px;
padding-left: 20px;
text-align: left;
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/**
* @tip Set the styling for your email's center column content links. Choose a color that helps them stand out from your text.
*/
.centerColumnContent a:link, .centerColumnContent a:visited, /* Yahoo! Mail Override */ .centerColumnContent a .yshortcuts /* Yahoo! Mail Override */{
color: #3d98c6;
font-weight: normal;
text-decoration: underline;
}
/**
* @tip Set the styling for your email's right column content text. Choose a size and color that is easy to read.
*/
.rightColumnContent{
color: #505050;
font-family: Helvetica;
font-size: 14px;
line-height: 150%;
padding-top: 0;
padding-right: 20px;
padding-bottom: 20px;
padding-left: 20px;
text-align: left;
}
/**
* @tip Set the styling for your email's right column content links. Choose a color that helps them stand out from your text.
*/
.rightColumnContent a:link, .rightColumnContent a:visited, /* Yahoo! Mail Override */ .rightColumnContent a .yshortcuts /* Yahoo! Mail Override */{
color: #3d98c6;
font-weight: normal;
text-decoration: underline;
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.leftColumnContent img, .rightColumnContent img{
display: inline;
height: auto;
max-width: 260px;
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* @tip Set the background color and borders for your email's footer area.
* @theme footer
*/
#templateFooter{
background-color: #F4F4F4;
border-top: 1px solid #FFFFFF;
}
/**
* @tip Set the styling for your email's footer text. Choose a size and color that is easy to read.
* @theme footer
*/
.footerContent{
color: #808080;
font-family: Helvetica;
font-size: 10px;
line-height: 150%;
padding-top: 20px;
padding-right: 20px;
padding-bottom: 20px;
padding-left: 20px;
text-align: left;
}
.footerContent.social, .footerContent.social h4 {
text-align: center;
}
.footerContent.social a {
margin: 0 10px;
}
/**
* @tip Set the styling for your email's footer links. Choose a color that helps them stand out from your text.
*/
.footerContent a:link, .footerContent a:visited, /* Yahoo! Mail Override */ .footerContent a .yshortcuts, .footerContent a span /* Yahoo! Mail Override */{
color: #606060;
font-weight: normal;
text-decoration: underline;
}
/* /\/\/\/\/\/\/\/\/ MOBILE STYLES /\/\/\/\/\/\/\/\/ */
@media only screen and (max-width: 480px){
/* /\/\/\/\/\/\/ CLIENT-SPECIFIC MOBILE STYLES /\/\/\/\/\/\/ */
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body{width: 100% !important; min-width: 100% !important;} /* Prevent iOS Mail from adding padding to the body */
/* /\/\/\/\/\/\/ MOBILE RESET STYLES /\/\/\/\/\/\/ */
#bodyCell{padding: 10px !important;}
/* /\/\/\/\/\/\/ MOBILE TEMPLATE STYLES /\/\/\/\/\/\/ */
/* ======== Page Styles ======== */
/**
* @tip Make the template fluid for portrait or landscape view adaptability. If a fluid layout doesn't work for you, set the width to 300px instead.
*/
#templateContainer{
max-width: 600px !important;
width: 100% !important;
}
/**
* @tip Make the first-level headings larger in size for better readability on small screens.
*/
h1{
font-size: 24px !important;
line-height: 100% !important;
}
/**
* @tip Make the second-level headings larger in size for better readability on small screens.
*/
h2{
font-size: 20px !important;
line-height: 100% !important;
}
/**
* @tip Make the third-level headings larger in size for better readability on small screens.
*/
h3{
font-size: 18px !important;
line-height: 100% !important;
}
/**
* @tip Make the fourth-level headings larger in size for better readability on small screens.
*/
h4{
font-size: 16px !important;
line-height: 100% !important;
}
/* ======== Header Styles ======== */
#templatePreheader{display: none !important;} /* Hide the template preheader to save space */
/**
* @tip Make the main header image fluid for portrait or landscape view adaptability, and set the image's original width as the max-width. If a fluid setting doesn't work, set the image width to half its original size instead.
*/
#headerImage{
height: auto !important;
max-width: 600px !important;
width: 100% !important;
}
/**
* @tip Make the header content text larger in size for better readability on small screens. We recommend a font size of at least 16px.
*/
.headerContent{
font-size: 20px !important;
line-height: 125% !important;
}
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<h1 class="xn-hedline">Cadence Introduces First Interface and Verification IP Solution for CCIX to Advance New Class of Datacenter Servers</h1>
<p class="xn-distributor">PR Newswire</p>
<p class="xn-dateline">SAN JOSE, Calif., May 2, 2017</p>
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<p>
<b><i>Design and verification IP address server cache-coherency requirements</i></b>
</p>
<p>
<span class="xn-location">SAN JOSE, Calif.</span>, <span class="xn-chron">May 2, 2017</span> /PRNewswire/ -- Cadence Design Systems, Inc. (NASDAQ: CDNS) today announced the industry's first interface and verification IP solution for Cache Coherent Interconnect for Accelerators (CCIX), an open chip-to-chip interconnect standard that advances the development of a new class of server solutions to address the challenging performance and latency requirements in the growing datacenter market. The Cadence<sup>®</sup> IP for CCIX, which consists of controller, PHY and verification IP, allows semiconductor manufacturers to develop new products for the enterprise server market more quickly and with greater confidence. The new IP for CCIX further extends the Cadence IP portfolio and Cadence Verification Suite technology, key components of the company's System Design Enablement strategy. </p>
<p>The proliferation of data-intensive applications along with the constraints of power and cooling are driving datacenters to deploy servers incorporating special-purpose accelerators. These accelerators share memory with processors in a cache-coherent manner and enable a heterogeneous server architecture to seamlessly share data with current speeds up to 25Gbps, reducing latency and increasing performance. </p>
<p>Supported by industry leaders, CCIX is a comprehensive hardware and software solution that builds on the pervasive PCI Express<sup>®</sup> (PCIe<sup>®</sup>) technology. The CCIX standard allows processors based on different instruction set architectures to extend the benefits of cache-coherent peer processing to various acceleration devices.</p>
<p>"ARM recognizes that the new CCIX specification supporting cache coherency is extremely important to the enterprise ecosystem," said <span class="xn-person">Monika Biddulph</span>, general manager, Systems and Software Group, ARM. "Together, the Cadence IP for CCIX and the ARM<sup>®</sup> CoreLink™ CMN-600 Coherent Mesh Network provide a scalable, heterogeneous compute platform with high performance multichip connectivity that will enable innovative solutions for applications such as machine learning, network processing, storage off-load and analytics."</p>
<p>The Cadence Interface IP for CCIX is an integrated solution for CCIX based on the PCIe 4.0 specification. The integrated solution for CCIX includes controller, PHY, software drivers, scripts for design and verification, simulation models and user guides. The entire package is pre-verified using Cadence verification IP for CCIX. For more information on the interface IP solution, visit: <a href="https://ip.cadence.com/ipportfolio/ip-portfolio-overview/interface-ip/ccix-ip&CMP=DIP_PrRel_CDN_CCIX_0501_PP" rel="nofollow" target="_blank">http://www.cadence.com/go/ccixdip</a>.</p>
<p>"CCIX enables a new class of interconnect for emerging acceleration applications in the datacenter," said <span class="xn-person">Gaurav Singh</span>, chairman of the CCIX Consortium. "We are pleased to see Cadence taking a leading role in providing early access to IP products to accelerate CCIX adoption among our member companies."</p>
<p>The Cadence Verification IP for CCIX supports the Cadence Xcelium<sup>™</sup> Parallel Logic Simulator and third-party simulators. It also supports all major languages and methodologies and is used to verify all CCIX specification levels including PHY, transaction and cache coherency. The Cadence Interconnect Validator works with the verification IP for CCIX to ensure correctness and completeness of data as it passes through the fabric. For more information on the verification IP solution, visit: <a href="https://ip.cadence.com/ipportfolio/verification-ip/simulation-vip/other/ccix-simulation-vip&CMP=VIP_PrRel_CDN_CCIX_0501_PP" rel="nofollow" target="_blank">http://www.cadence.com/go/ccixvip</a>. </p>
<p>"Cadence is a pioneer and industry leader in PCIe, and we're leveraging our deep expertise in PCIe and cache coherency to develop an innovative solution for CCIX," said Babu Mandava, senior vice president and general manager of the IP Group at Cadence. "Because our CCIX enterprise development solution is integrated and based on silicon-proven design IP for the PCIe specification, along with mature and comprehensive verification IP, our customers can develop new products for the server market more quickly, with high confidence and shorter time to market. We are encouraged by our early customer engagements."</p>
<p>
<b>About Cadence </b>
</p>
<p>Cadence enables electronic systems and semiconductor companies to create the innovative end products that are transforming the way people live, work and play. Cadence software, hardware and semiconductor IP are used by customers to deliver products to market faster. The company's System Design Enablement strategy helps customers develop differentiated products—from chips to boards to systems—in mobile, consumer, cloud datacenter, automotive, aerospace, IoT, industrial and other market segments. Cadence is listed as one of Fortune Magazine's 100 Best Companies to Work For. Learn more at <a href="http://www.cadence.com/" rel="nofollow" target="_blank">cadence.com</a><u>.</u>
</p>
<p>
<i>© 2017 Cadence Design Systems, Inc. All rights reserved worldwide. Cadence, the Cadence logo and the other Cadence marks found at </i><i><a href="http://www.cadence.com/go/trademarks" rel="nofollow">http://www.cadence.com/go/trademarks</a></i> <i>are trademarks or registered trademarks of Cadence Design Systems, Inc. </i><i>PCI Express and PCIe are registered trademarks of PCI-SIG.</i><i> All other trademarks are the property of their respective holders.</i>
</p>
<p>Cadence Newsroom<br>408-944-7039<br>
<a href="mailto:newsroom@cadence.com" rel="nofollow" target="_blank">newsroom@cadence.com</a>
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<p>SOURCE Cadence Design Systems, Inc.</p>
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