Achronix and Mentor Partner to Provide Link Between High-Level Synthesis and FPGA Technology
Poster: SySAdmin
Posted on August 8, 2018 at 10:28:01 AM
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style="Margin:0;color:#0a0a0a;font-family:Montserrat,Arial,sans-serif;font-size:16px;font-weight:400;line-height:1.3;margin:0;padding:0!important;text-align:left;visibility:hidden;width:0"></th></tr></table></th> </tr></tbody></table><table class="row sub-header"style="background:#00837E;border-collapse:collapse;border-spacing:0;display:table;padding:0;position:relative;text-align:left;vertical-align:top;width:100%"><tbody><tr style="padding:0;text-align:left;vertical-align:top"><th class="small-12 large-12 columns first last" style="Margin:0 auto;color:#0a0a0a;font-family:Montserrat,Arial,sans-serif;font-size:16px;font-weight:400;line-height:1.3;margin:0 auto;padding:0;padding-bottom:16px;padding-left:30px;padding-right:30px;text-align:left;width:570px"><table style="border-collapse:collapse;border-spacing:0;padding:0;text-align:left;vertical-align:top;width:100%"><tr style="padding:0;text-align:left;vertical-align:top"><th style="Margin:0;color:#0a0a0a;font-family:Montserrat,Arial,sans-serif;font-size:16px;font-weight:400;line-height:1.3;margin:0;padding:0;text-align:left"><table class="spacer" style="border-collapse:collapse;border-spacing:0;padding:0;text-align:left;vertical-align:top;width:100%"><tbody><tr style="padding:0;text-align:left;vertical-align:top"><td height="16px" style="-moz-hyphens:auto;-webkit-hyphens:auto;Margin:0;border-collapse:collapse!important;color:#0a0a0a;font-family:Montserrat,Arial,sans-serif;font-size:16px;font-weight:400;hyphens:auto;line-height:16px;margin:0;mso-line-height-rule:exactly;padding:0;text-align:left;vertical-align:top;word-wrap:break-word"> </td></tr></tbody></table> <h4 class="text-center" style="-moz-hyphens:none;-webkit-hyphens:none;Margin:0;Margin-bottom:10px;color:#fff;font-family:Montserrat,Arial,sans-serif;font-size:18px;font-weight:400;hyphens:none;line-height:22px;margin:0;margin-bottom:10px;padding:0;text-align:center;text-transform:uppercase;word-break:none;word-wrap:normal">News From Achronix</h4><h5 class="text-center" style="-moz-hyphens:none;-webkit-hyphens:none;Margin:0;Margin-bottom:10px;color:#fff;font-family:Montserrat,Arial,sans-serif;font-size:14px;font-weight:500;hyphens:none;line-height:18px;margin:0;margin-bottom:0;padding:0;text-align:center;word-break:none;word-wrap:normal">Transmitted by PR Newswire for Journalists on <span class="prevent-break" style="display:inline-block">August 07, 2018 10:00 AM EST </span></h5></th><th class="expander" style="Margin:0;color:#0a0a0a;font-family:Montserrat,Arial,sans-serif;font-size:16px;font-weight:400;line-height:1.3;margin:0;padding:0!important;text-align:left;visibility:hidden;width:0"></th></tr></table></th></tr></tbody></table><table class="row header" style="background:#e5f2f3;border-collapse:collapse;border-spacing:0;display:table;padding:0;position:relative;text-align:left;vertical-align:top;width:100%"><tbody><tr style="padding:0;text-align:left;vertical-align:top"><th class="small-12 large-12 columns first last" style="Margin:0 auto;color:#0a0a0a;font-family:Montserrat,Arial,sans-serif;font-size:16px;font-weight:400;line-height:1.3;margin:0 auto;padding:0;padding-bottom:0;padding-left:30px;padding-right:30px;text-align:left;width:570px"><table style="border-collapse:collapse;border-spacing:0;padding:0;text-align:left;vertical-align:top;width:100%"><tr style="padding:0;text-align:left;vertical-align:top"><th style="Margin:0;color:#0a0a0a;font-family:Montserrat,Arial,sans-serif;font-size:16px;font-weight:400;line-height:1.3;margin:0;padding:0;text-align:left"> <table class="spacer" style="border-collapse:collapse;border-spacing:0;padding:0;text-align:left;vertical-align:top;width:100%"><tbody><tr style="padding:0;text-align:left;vertical-align:top"><td height="24px" style="-moz-hyphens:auto;-webkit-hyphens:auto;Margin:0;border-collapse:collapse!important;color:#0a0a0a;font-family:Montserrat,Arial,sans-serif;font-size:24px;font-weight:400;hyphens:auto;line-height:24px;margin:0;mso-line-height-rule:exactly;padding:0;text-align:left;vertical-align:top;word-wrap:break-word"> </td></tr></tbody></table> <h1 style="Margin:0;Margin-bottom:10px;color:#4D4E53;font-family:Montserrat,Arial,sans-serif;font-size:20px;font-weight:500;line-height:28px;margin:0;margin-bottom:0;padding:0;text-align:left;word-wrap:normal">Achronix and Mentor Partner to Provide Link Between High-Level Synthesis and FPGA Technology</h1> <table class="spacer" style="border-collapse:collapse;border-spacing:0;padding:0;text-align:left;vertical-align:top;width:100%"><tbody><tr style="padding:0;text-align:left;vertical-align:top"><td height="24px" style="-moz-hyphens:auto;-webkit-hyphens:auto;Margin:0;border-collapse:collapse!important;color:#0a0a0a;font-family:Montserrat,Arial,sans-serif;font-size:24px;font-weight:400;hyphens:auto;line-height:24px;margin:0;mso-line-height-rule:exactly;padding:0;text-align:left;vertical-align:top;word-wrap:break-word"> </td></tr></tbody></table> </th><th class="expander" style="Margin:0;color:#0a0a0a;font-family:Montserrat,Arial,sans-serif;font-size:16px;font-weight:400;line-height:1.3;margin:0;padding:0!important;text-align:left;visibility:hidden;width:0"></th></tr></table></th> </tr></tbody></table> <table class="row content" style="background:#fff;border-collapse:collapse;border-spacing:0;display:table;padding:0;position:relative;text-align:left;vertical-align:top;width:100%"><tbody><tr style="padding:0;text-align:left;vertical-align:top"><th class="small-12 large-12 columns first last" style="Margin:0 auto;color:#0a0a0a;font-family:Montserrat,Arial,sans-serif;font-size:16px;font-weight:400;line-height:1.3;margin:0 auto;padding:0;padding-bottom:16px;padding-left:30px;padding-right:30px;text-align:left;width:570px"><table style="border-collapse:collapse;border-spacing:0;padding:0;text-align:left;vertical-align:top;width:100%"><tr style="padding:0;text-align:left;vertical-align:top"><th style="Margin:0;color:#0a0a0a;font-family:Montserrat,Arial,sans-serif;font-size:16px;font-weight:400;line-height:1.3;margin:0;padding:0;text-align:left"> <table class="spacer" style="border-collapse:collapse;border-spacing:0;padding:0;text-align:left;vertical-align:top;width:100%"><tbody><tr style="padding:0;text-align:left;vertical-align:top"><td height="24px" style="-moz-hyphens:auto;-webkit-hyphens:auto;Margin:0;border-collapse:collapse!important;color:#0a0a0a;font-family:Montserrat,Arial,sans-serif;font-size:24px;font-weight:400;hyphens:auto;line-height:24px;margin:0;mso-line-height-rule:exactly;padding:0;text-align:left;vertical-align:top;word-wrap:break-word"> </td></tr></tbody></table><p class="sub-headline" style="Margin:0;Margin-bottom:10px;color:#4D4E53;font-family:Montserrat,Arial,sans-serif;font-size:14px;font-weight:500;line-height:20px;margin:0;margin-bottom:16px;padding:0;text-align:left"><strong>- Achronix Speedcore eFPGAs fully supported by Catapult HLS<br/>- Catapult HLS delivers integrated design and development environment to FPGA flow for 5G Wireless Applications</strong><p><span class="xn-location">SANTA CLARA, Calif.</span>, <span class="xn-chron">Aug. 7, 2018</span> /PRNewswire/ -- <a href="http://email.prnewswire.com/wf/click?upn=TwIh0OIjG8BOSB67uKqqj10rxqImhY17RM9HbN5rufA-3D_q1N77mbql2CxsoEfo2fFiZ6dnlev64IGUSa1KT1DDw1MuprZmQ6aap9NY9k0Le750dX98uIi3jUtrnoWVJCqwNps9aNer0CRU1oN7XXYmby52lWbc0UCBJW9kT-2Bf1uYgKszxEENHpgGi28UR3U-2FZj5bSiNMs8IWXZKgZn3-2BMHBDCzgSbml-2BBve2jXGmfsOis2PvZm5mWV1rTy0zkkc4T7ATrffPZE87fxEkoSkyc3Ooc9C1r3L3V1AuDP-2BKi0rpNeqNbx5YeJL4-2FjZu-2BcrrpvrAGtSrizahXDVjGyVrlLYOwx-2BVq6hdROiYZxjVuxqRaXpQ995C1po0lCRgw3bagZA-3D-3D" rel="nofollow" target="_blank">Achronix Semiconductor Corporation</a><u>,</u> a leader in field programmable gate array (FPGA)-based hardware accelerator devices and embedded FPGA (eFPGA) intellectual property (IP), today announced availability of an optimized High-Level Synthesis (HLS) flow from its partner, <a href="http://email.prnewswire.com/wf/click?upn=7VDqtAz2AW-2FeY7Xnbvsasbz3ta3rsThMluKggmY2SWA-3D_q1N77mbql2CxsoEfo2fFiZ6dnlev64IGUSa1KT1DDw1MuprZmQ6aap9NY9k0Le750dX98uIi3jUtrnoWVJCqwNps9aNer0CRU1oN7XXYmby52lWbc0UCBJW9kT-2Bf1uYgKszxEENHpgGi28UR3U-2FZj5bSiNMs8IWXZKgZn3-2BMHBDCzgSbml-2BBve2jXGmfsOisw-2FAuwd1XooXjWhTJgb0dUwpz1Dx4-2BbwPxRVZqf9Tr51vixKnmFqQ-2FMjlvLX-2F-2BNXMPAwql-2FsFD1Bxs6zGqzWZbjHQAnMqk1yuFf8BKI7ungK8Wb-2F1HOvaJyt7W10mEheXIjhjJwL59cLf6BKqZmUtZw-3D-3D" rel="nofollow" target="_blank">Mentor, a Siemens business</a>, for its FPGA technology products. </p>
<p>The integrated development environment enables designers to quickly go from C++ to FPGA using Mentor's Catapult® HLS and Achronix's ACE design tools. Initially used for 5G wireless applications to reduce the overall development effort and improve quality of results (QoR), it is suitable for any design targeting Achronix technology. </p><th class="expander" style="Margin:0;color:#0a0a0a;font-family:Montserrat,Arial,sans-serif;font-size:16px;font-weight:400;line-height:1.3;margin:0;padding:0!important;text-align:left;visibility:hidden;width:0"></th></tr></table></th></tr></tbody></table><table class="row content" style="background:#fff;border-collapse:collapse;border-spacing:0;display:table;padding:0;position:relative;text-align:left;vertical-align:top;width:100%"><tbody><tr style="padding:0;text-align:left;vertical-align:top"><th class="small-12 large-12 columns first last" style="Margin:0 auto;color:#0a0a0a;font-family:Montserrat,Arial,sans-serif;font-size:16px;font-weight:400;line-height:1.3;margin:0 auto;padding:0;padding-bottom:16px;padding-left:30px;padding-right:30px;text-align:left;width:570px"><table style="border-collapse:collapse;border-spacing:0;padding:0;text-align:left;vertical-align:top;width:100%"><tr style="padding:0;text-align:left;vertical-align:top"><th style="Margin:0;color:#0a0a0a;font-family:Montserrat,Arial,sans-serif;font-size:16px;font-weight:400;line-height:1.3;margin:0;padding:0;text-align:left"><center data-parsed="" style="min-width:510px;width:100%"><img src="https://mma.prnewswire.com/media/727433/ACHRONIX_Logo.jpg" alt="" align="center" class="float-center" style="-ms-interpolation-mode:bicubic;Margin:0 auto;clear:both;display:block;float:none;margin:0 auto;max-width:100%;outline:0;text-align:center;text-decoration:none;width:auto"></center></th><th class="expander" style="Margin:0;color:#0a0a0a;font-family:Montserrat,Arial,sans-serif;font-size:16px;font-weight:400;line-height:1.3;margin:0;padding:0!important;text-align:left;visibility:hidden;width:0"></th></tr></table></th></tr></tbody></table><table class="row content" style="background:#fff;border-collapse:collapse;border-spacing:0;display:table;padding:0;position:relative;text-align:left;vertical-align:top;width:100%"><tbody><tr style="padding:0;text-align:left;vertical-align:top"><th class="small-12 large-12 columns first last" style="Margin:0 auto;color:#0a0a0a;font-family:Montserrat,Arial,sans-serif;font-size:16px;font-weight:400;line-height:1.3;margin:0 auto;padding:0;padding-bottom:16px;padding-left:30px;padding-right:30px;text-align:left;width:570px"><table style="border-collapse:collapse;border-spacing:0;padding:0;text-align:left;vertical-align:top;width:100%"><tr style="padding:0;text-align:left;vertical-align:top"><th style="Margin:0;color:#0a0a0a;font-family:Montserrat,Arial,sans-serif;font-size:16px;font-weight:400;line-height:1.3;margin:0;padding:0;text-align:left">
<p>"The combination of Mentor's powerful Catapult tools and Achronix's embedded FPGA technology offer a truly unique value proposition for companies that require high performance FPGA technology in their SoC that can be configured using a proven Câbased design flow," remarks <span class="xn-person">Steve Mensor</span>, Achronix's vice president of marketing. "This combined solution is a great testament of a close working relationship between the engineering groups at Mentor and Achronix. Our initial target was 5G wireless, but the unique capabilities of the overall solution will be valuable across many market segments that require the fastest development time." </p>
<p>"We are happy to welcome Achronix to the Mentor OpenDoor Program, and pleased to be an active member of the Achronix Partner Program. This open and collaborative partnership is very strategic and is already proving beneficial to our mutual customers," notes <span class="xn-person">Ellie Burns</span>, director of marketing, Calypto Systems Division at Mentor. "Achronix eFPGA offers a tremendous ability to adapt to late changing and new requirements in a field programmable SoC. Coupled with Catapult HLS and the verification speed of C++, chip designers can now easily go from algorithm change to new low-power, high-performance hardware in days rather than weeks or months."</p>
<p><b>The Catapult to Achronix Flow<br></b>The Catapult HLS to Speedcore embedded FPGA technology flow gives designers the ability to make algorithmic changes in late stages of IP development and to optimize the algorithm and the digital micro-architecture. The integrated verification environment allows reuse of the software tests for generated register transfer level (RTL) code, reducing the need for dedicated RTL test benches by more than 80%. </p>
<p>Achronix ACE design tools support Catapult's RTL constructs and primitives. Currently Achronix libraries for its Speedcore eFPGA products and for its Speedster standalone FPGAs are integrated into the flow.</p>
<p>The Achronix high-performance and high-density FPGA technology can be used for diverse hardware acceleration applications in data center compute, networking and storage; 5G wireless infrastructure, network acceleration; advanced driver assistance systems (ADAS) and autonomous vehicles. </p>
<p><b>Availability<br></b>Early versions of the design and development environment are available now.</p>
<p><b>About Achronix Semiconductor Corporation<br></b><a href="http://email.prnewswire.com/wf/click?upn=TwIh0OIjG8BOSB67uKqqj10rxqImhY17RM9HbN5rufA-3D_q1N77mbql2CxsoEfo2fFiZ6dnlev64IGUSa1KT1DDw1MuprZmQ6aap9NY9k0Le750dX98uIi3jUtrnoWVJCqwNps9aNer0CRU1oN7XXYmby52lWbc0UCBJW9kT-2Bf1uYgKszxEENHpgGi28UR3U-2FZj5bSiNMs8IWXZKgZn3-2BMHBDCzgSbml-2BBve2jXGmfsOisZzbE6Iw5yUqjtsuEgvUQz1nKJu0lC2HsfjhinVEHnELThLtKaUbun-2FMjDS20-2FGKtlChA73pKgnvQeWLDX-2F249cFG-2BT1HoWOl9-2BUZT5ZdON8Nd-2BoHMSnTI9iwynZUEQ7MjrFcTOgjE3oWeA4T6Lnh-2FQ-3D-3D" rel="nofollow" target="_blank">Achronix</a> is a privately held, fabless semiconductor corporation based in <span class="xn-location">Santa Clara, California</span>. The company developed its FPGA technology which is the basis of the Speedster22i FPGAs and Speedcore eFPGA technology. All Achronix FPGA products are supported by its ACE design tools that include integrated support for Synopsys Synplify Pro. </p>
<p>The company has sales offices and representatives in <span class="xn-location">the United States</span>, <span class="xn-location">Europe</span>, and <span class="xn-location">China</span>, and has a research and design office in <span class="xn-location">Bangalore, India</span>. </p>
<p><b>Follow Achronix:<br></b>Website: <a href="http://email.prnewswire.com/wf/click?upn=TwIh0OIjG8BOSB67uKqqj10rxqImhY17RM9HbN5rufA-3D_q1N77mbql2CxsoEfo2fFiZ6dnlev64IGUSa1KT1DDw1MuprZmQ6aap9NY9k0Le750dX98uIi3jUtrnoWVJCqwNps9aNer0CRU1oN7XXYmby52lWbc0UCBJW9kT-2Bf1uYgKszxEENHpgGi28UR3U-2FZj5bSiNMs8IWXZKgZn3-2BMHBDCzgSbml-2BBve2jXGmfsOis902kpvbV4agkeE6fkx6de9IwExh8ARQYcSZns6osAyorGy9K7KbbTd2wzbQCimPc2JlfnywAQbZWst6masc-2FAkpEUW-2BYOjBS4J1gemzel9ovPip58cMhoYtefUE4BfIXUJo-2F1aiWmHncIU8s2KAA3A-3D-3D" rel="nofollow" target="_blank">http://www.achronix.com</a> <br>The Achronix Blog: <a href="http://email.prnewswire.com/wf/click?upn=7VDqtAz2AW-2FeY7XnbvsasTFOzz5Ww-2Bf9Eo22Y5IqlT0MFXedTevit3yS7zdOq6gG_q1N77mbql2CxsoEfo2fFiZ6dnlev64IGUSa1KT1DDw1MuprZmQ6aap9NY9k0Le750dX98uIi3jUtrnoWVJCqwNps9aNer0CRU1oN7XXYmby52lWbc0UCBJW9kT-2Bf1uYgKszxEENHpgGi28UR3U-2FZj5bSiNMs8IWXZKgZn3-2BMHBDCzgSbml-2BBve2jXGmfsOisegV4fd-2FH3jxkHfahFj8XFU1-2BclfEFig-2F6k1h-2BEHhZtDb5Mq24-2FVGbbMVVDTshqgM19n2gydB-2F6Cq2T7nQrz33LPcsex5X-2FX558qTz-2FkK8HGebjFMZAUq-2Bj8jO98LLhMUx0bGLkAgq2o7eQ-2FavNHmrg-3D-3D" rel="nofollow" target="_blank">https://www.achronix.com/blogs/</a><br>Twitter: @AchronixInc <br>LinkedIn: <a href="http://email.prnewswire.com/wf/click?upn=7VDqtAz2AW-2FeY7XnbvsasaGI94tj-2F1l36fYlCraRYLE7V7XRauurH4-2BOHDQZoD7J_q1N77mbql2CxsoEfo2fFiZ6dnlev64IGUSa1KT1DDw1MuprZmQ6aap9NY9k0Le750dX98uIi3jUtrnoWVJCqwNps9aNer0CRU1oN7XXYmby52lWbc0UCBJW9kT-2Bf1uYgKszxEENHpgGi28UR3U-2FZj5bSiNMs8IWXZKgZn3-2BMHBDCzgSbml-2BBve2jXGmfsOisqxtjboZwN1sSfOD-2BuHeh727tkA5AwOuX9oBAjNIQKRq-2B1e3TFUnpVvaw2qJ9ESLkpG7Mwia-2FPq1atYe4Ns7XQeXXiEBGthEZ4edRSQpN7NM28T2U1qVrlCdIqUxuU8p-2FCwtSwxeiabLBto1HAm8MYQ-3D-3D" rel="nofollow" target="_blank">https://www.linkedin.com/company/57668/</a> <br>Facebook: <a href="http://email.prnewswire.com/wf/click?upn=7VDqtAz2AW-2FeY7XnbvsasQ-2FREeMBG2bqGXdCB4XzZ7DeXdrC0KqJCvDC2nTp51wq_q1N77mbql2CxsoEfo2fFiZ6dnlev64IGUSa1KT1DDw1MuprZmQ6aap9NY9k0Le750dX98uIi3jUtrnoWVJCqwNps9aNer0CRU1oN7XXYmby52lWbc0UCBJW9kT-2Bf1uYgKszxEENHpgGi28UR3U-2FZj5bSiNMs8IWXZKgZn3-2BMHBDCzgSbml-2BBve2jXGmfsOis8sU2ESoPrgqAfcmfWVj00M1YdRb0WcaEn4-2FUI0gawvv969dvx-2BNZnJ-2F3OBrG1qtMUWnHqeLwwVF2DvK0sQI9g5jx5SnjaVbizghMMvUwElTuYrDrbuY6JA-2Bt1PwA6iEGg11OJfrwLD0jr00S14WyiQ-3D-3D" rel="nofollow" target="_blank">https://www.facebook.com/achronix/</a> </p>
<p>Achronix and Speedster are registered trademarks and Speedcore and Speedchip are trademarks of Achronix Semiconductor Corporation. All other brands, product names and marks are the property of their respective owners. </p>
<p><b>Contacts:</b></p>
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<td class="prngen2"> <p class="prnews_p"><span class="prnews_span">Alok Sanghavi</span></p> </td>
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<td class="prngen2"> <p class="prnews_p"><span class="prnews_span">Achronix Semiconductor Corporation<br>408-889-4142<br><a class="prnews_a" href="mailto:alok@achronix.com" rel="nofollow" target="_blank">alok@achronix.com</a> </span></p> </td>
<td class="prngen2"> <p class="prnews_p"><span class="prnews_span">Nanette V. Collins Marketing and Public Relations<br>617-437-1822<br><a class="prnews_a" href="mailto:nanette@nvc.com" rel="nofollow" target="_blank">nanette@nvc.com</a> </span></p> </td>
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<p>The integrated development environment enables designers to quickly go from C++ to FPGA using Mentor's Catapult® HLS and Achronix's ACE design tools. Initially used for 5G wireless applications to reduce the overall development effort and improve quality of results (QoR), it is suitable for any design targeting Achronix technology. </p><th class="expander" style="Margin:0;color:#0a0a0a;font-family:Montserrat,Arial,sans-serif;font-size:16px;font-weight:400;line-height:1.3;margin:0;padding:0!important;text-align:left;visibility:hidden;width:0"></th></tr></table></th></tr></tbody></table><table class="row content" style="background:#fff;border-collapse:collapse;border-spacing:0;display:table;padding:0;position:relative;text-align:left;vertical-align:top;width:100%"><tbody><tr style="padding:0;text-align:left;vertical-align:top"><th class="small-12 large-12 columns first last" style="Margin:0 auto;color:#0a0a0a;font-family:Montserrat,Arial,sans-serif;font-size:16px;font-weight:400;line-height:1.3;margin:0 auto;padding:0;padding-bottom:16px;padding-left:30px;padding-right:30px;text-align:left;width:570px"><table style="border-collapse:collapse;border-spacing:0;padding:0;text-align:left;vertical-align:top;width:100%"><tr style="padding:0;text-align:left;vertical-align:top"><th style="Margin:0;color:#0a0a0a;font-family:Montserrat,Arial,sans-serif;font-size:16px;font-weight:400;line-height:1.3;margin:0;padding:0;text-align:left"><center data-parsed="" style="min-width:510px;width:100%"><img src="https://mma.prnewswire.com/media/727433/ACHRONIX_Logo.jpg" alt="" align="center" class="float-center" style="-ms-interpolation-mode:bicubic;Margin:0 auto;clear:both;display:block;float:none;margin:0 auto;max-width:100%;outline:0;text-align:center;text-decoration:none;width:auto"></center></th><th class="expander" style="Margin:0;color:#0a0a0a;font-family:Montserrat,Arial,sans-serif;font-size:16px;font-weight:400;line-height:1.3;margin:0;padding:0!important;text-align:left;visibility:hidden;width:0"></th></tr></table></th></tr></tbody></table><table class="row content" style="background:#fff;border-collapse:collapse;border-spacing:0;display:table;padding:0;position:relative;text-align:left;vertical-align:top;width:100%"><tbody><tr style="padding:0;text-align:left;vertical-align:top"><th class="small-12 large-12 columns first last" style="Margin:0 auto;color:#0a0a0a;font-family:Montserrat,Arial,sans-serif;font-size:16px;font-weight:400;line-height:1.3;margin:0 auto;padding:0;padding-bottom:16px;padding-left:30px;padding-right:30px;text-align:left;width:570px"><table style="border-collapse:collapse;border-spacing:0;padding:0;text-align:left;vertical-align:top;width:100%"><tr style="padding:0;text-align:left;vertical-align:top"><th style="Margin:0;color:#0a0a0a;font-family:Montserrat,Arial,sans-serif;font-size:16px;font-weight:400;line-height:1.3;margin:0;padding:0;text-align:left">
<p>"The combination of Mentor's powerful Catapult tools and Achronix's embedded FPGA technology offer a truly unique value proposition for companies that require high performance FPGA technology in their SoC that can be configured using a proven Câbased design flow," remarks <span class="xn-person">Steve Mensor</span>, Achronix's vice president of marketing. "This combined solution is a great testament of a close working relationship between the engineering groups at Mentor and Achronix. Our initial target was 5G wireless, but the unique capabilities of the overall solution will be valuable across many market segments that require the fastest development time." </p>
<p>"We are happy to welcome Achronix to the Mentor OpenDoor Program, and pleased to be an active member of the Achronix Partner Program. This open and collaborative partnership is very strategic and is already proving beneficial to our mutual customers," notes <span class="xn-person">Ellie Burns</span>, director of marketing, Calypto Systems Division at Mentor. "Achronix eFPGA offers a tremendous ability to adapt to late changing and new requirements in a field programmable SoC. Coupled with Catapult HLS and the verification speed of C++, chip designers can now easily go from algorithm change to new low-power, high-performance hardware in days rather than weeks or months."</p>
<p><b>The Catapult to Achronix Flow<br></b>The Catapult HLS to Speedcore embedded FPGA technology flow gives designers the ability to make algorithmic changes in late stages of IP development and to optimize the algorithm and the digital micro-architecture. The integrated verification environment allows reuse of the software tests for generated register transfer level (RTL) code, reducing the need for dedicated RTL test benches by more than 80%. </p>
<p>Achronix ACE design tools support Catapult's RTL constructs and primitives. Currently Achronix libraries for its Speedcore eFPGA products and for its Speedster standalone FPGAs are integrated into the flow.</p>
<p>The Achronix high-performance and high-density FPGA technology can be used for diverse hardware acceleration applications in data center compute, networking and storage; 5G wireless infrastructure, network acceleration; advanced driver assistance systems (ADAS) and autonomous vehicles. </p>
<p><b>Availability<br></b>Early versions of the design and development environment are available now.</p>
<p><b>About Achronix Semiconductor Corporation<br></b><a href="http://email.prnewswire.com/wf/click?upn=TwIh0OIjG8BOSB67uKqqj10rxqImhY17RM9HbN5rufA-3D_q1N77mbql2CxsoEfo2fFiZ6dnlev64IGUSa1KT1DDw1MuprZmQ6aap9NY9k0Le750dX98uIi3jUtrnoWVJCqwNps9aNer0CRU1oN7XXYmby52lWbc0UCBJW9kT-2Bf1uYgKszxEENHpgGi28UR3U-2FZj5bSiNMs8IWXZKgZn3-2BMHBDCzgSbml-2BBve2jXGmfsOisZzbE6Iw5yUqjtsuEgvUQz1nKJu0lC2HsfjhinVEHnELThLtKaUbun-2FMjDS20-2FGKtlChA73pKgnvQeWLDX-2F249cFG-2BT1HoWOl9-2BUZT5ZdON8Nd-2BoHMSnTI9iwynZUEQ7MjrFcTOgjE3oWeA4T6Lnh-2FQ-3D-3D" rel="nofollow" target="_blank">Achronix</a> is a privately held, fabless semiconductor corporation based in <span class="xn-location">Santa Clara, California</span>. The company developed its FPGA technology which is the basis of the Speedster22i FPGAs and Speedcore eFPGA technology. All Achronix FPGA products are supported by its ACE design tools that include integrated support for Synopsys Synplify Pro. </p>
<p>The company has sales offices and representatives in <span class="xn-location">the United States</span>, <span class="xn-location">Europe</span>, and <span class="xn-location">China</span>, and has a research and design office in <span class="xn-location">Bangalore, India</span>. </p>
<p><b>Follow Achronix:<br></b>Website: <a href="http://email.prnewswire.com/wf/click?upn=TwIh0OIjG8BOSB67uKqqj10rxqImhY17RM9HbN5rufA-3D_q1N77mbql2CxsoEfo2fFiZ6dnlev64IGUSa1KT1DDw1MuprZmQ6aap9NY9k0Le750dX98uIi3jUtrnoWVJCqwNps9aNer0CRU1oN7XXYmby52lWbc0UCBJW9kT-2Bf1uYgKszxEENHpgGi28UR3U-2FZj5bSiNMs8IWXZKgZn3-2BMHBDCzgSbml-2BBve2jXGmfsOis902kpvbV4agkeE6fkx6de9IwExh8ARQYcSZns6osAyorGy9K7KbbTd2wzbQCimPc2JlfnywAQbZWst6masc-2FAkpEUW-2BYOjBS4J1gemzel9ovPip58cMhoYtefUE4BfIXUJo-2F1aiWmHncIU8s2KAA3A-3D-3D" rel="nofollow" target="_blank">http://www.achronix.com</a> <br>The Achronix Blog: <a href="http://email.prnewswire.com/wf/click?upn=7VDqtAz2AW-2FeY7XnbvsasTFOzz5Ww-2Bf9Eo22Y5IqlT0MFXedTevit3yS7zdOq6gG_q1N77mbql2CxsoEfo2fFiZ6dnlev64IGUSa1KT1DDw1MuprZmQ6aap9NY9k0Le750dX98uIi3jUtrnoWVJCqwNps9aNer0CRU1oN7XXYmby52lWbc0UCBJW9kT-2Bf1uYgKszxEENHpgGi28UR3U-2FZj5bSiNMs8IWXZKgZn3-2BMHBDCzgSbml-2BBve2jXGmfsOisegV4fd-2FH3jxkHfahFj8XFU1-2BclfEFig-2F6k1h-2BEHhZtDb5Mq24-2FVGbbMVVDTshqgM19n2gydB-2F6Cq2T7nQrz33LPcsex5X-2FX558qTz-2FkK8HGebjFMZAUq-2Bj8jO98LLhMUx0bGLkAgq2o7eQ-2FavNHmrg-3D-3D" rel="nofollow" target="_blank">https://www.achronix.com/blogs/</a><br>Twitter: @AchronixInc <br>LinkedIn: <a href="http://email.prnewswire.com/wf/click?upn=7VDqtAz2AW-2FeY7XnbvsasaGI94tj-2F1l36fYlCraRYLE7V7XRauurH4-2BOHDQZoD7J_q1N77mbql2CxsoEfo2fFiZ6dnlev64IGUSa1KT1DDw1MuprZmQ6aap9NY9k0Le750dX98uIi3jUtrnoWVJCqwNps9aNer0CRU1oN7XXYmby52lWbc0UCBJW9kT-2Bf1uYgKszxEENHpgGi28UR3U-2FZj5bSiNMs8IWXZKgZn3-2BMHBDCzgSbml-2BBve2jXGmfsOisqxtjboZwN1sSfOD-2BuHeh727tkA5AwOuX9oBAjNIQKRq-2B1e3TFUnpVvaw2qJ9ESLkpG7Mwia-2FPq1atYe4Ns7XQeXXiEBGthEZ4edRSQpN7NM28T2U1qVrlCdIqUxuU8p-2FCwtSwxeiabLBto1HAm8MYQ-3D-3D" rel="nofollow" target="_blank">https://www.linkedin.com/company/57668/</a> <br>Facebook: <a href="http://email.prnewswire.com/wf/click?upn=7VDqtAz2AW-2FeY7XnbvsasQ-2FREeMBG2bqGXdCB4XzZ7DeXdrC0KqJCvDC2nTp51wq_q1N77mbql2CxsoEfo2fFiZ6dnlev64IGUSa1KT1DDw1MuprZmQ6aap9NY9k0Le750dX98uIi3jUtrnoWVJCqwNps9aNer0CRU1oN7XXYmby52lWbc0UCBJW9kT-2Bf1uYgKszxEENHpgGi28UR3U-2FZj5bSiNMs8IWXZKgZn3-2BMHBDCzgSbml-2BBve2jXGmfsOis8sU2ESoPrgqAfcmfWVj00M1YdRb0WcaEn4-2FUI0gawvv969dvx-2BNZnJ-2F3OBrG1qtMUWnHqeLwwVF2DvK0sQI9g5jx5SnjaVbizghMMvUwElTuYrDrbuY6JA-2Bt1PwA6iEGg11OJfrwLD0jr00S14WyiQ-3D-3D" rel="nofollow" target="_blank">https://www.facebook.com/achronix/</a> </p>
<p>Achronix and Speedster are registered trademarks and Speedcore and Speedchip are trademarks of Achronix Semiconductor Corporation. All other brands, product names and marks are the property of their respective owners. </p>
<p><b>Contacts:</b></p>
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<td class="prngen2"> <p class="prnews_p"><span class="prnews_span">Alok Sanghavi</span></p> </td>
<td class="prngen2"> <p class="prnews_p"><span class="prnews_span">Nanette Collins</span></p> </td>
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<td class="prngen2"> <p class="prnews_p"><span class="prnews_span">Achronix Semiconductor Corporation<br>408-889-4142<br><a class="prnews_a" href="mailto:alok@achronix.com" rel="nofollow" target="_blank">alok@achronix.com</a> </span></p> </td>
<td class="prngen2"> <p class="prnews_p"><span class="prnews_span">Nanette V. Collins Marketing and Public Relations<br>617-437-1822<br><a class="prnews_a" href="mailto:nanette@nvc.com" rel="nofollow" target="_blank">nanette@nvc.com</a> </span></p> </td>
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